1. Field of the Invention
The invention relates generally to CMOS semiconductor products. More particularly, the invention relates to latch-up resistant CMOS semiconductor products.
2. Description of the Related Art
Semiconductor products are fabricated employing transistors as switching elements within circuits typically directed to either data storage applications or data manipulation applications. Particularly common semiconductor products are complementary metal oxide semiconductor (CMOS) semiconductor products. CMOS products employ alternating arrays of n-channel metal oxide semiconductor (MOS) transistors and p-channel metal oxide semiconductor (MOS) transistors. CMOS semiconductor products are generally desirable since they are easy to fabricate and they operate efficiently.
Although CMOS semiconductor products are quite common, they are nonetheless not entirely without problems. In particular, due to the presence of complementary polarities of MOS transistors, CMOS semiconductor products are often susceptible to latch-up. Latch-up is a phenomenon where various doped components within opposite polarity MOS transistors electrically connect to form undesirable parasitic devices, such as parasitic transistors. Latch-up effects become pronounced as CMOS semiconductor product dimensions decrease. They often provide electrical current flows that may physically damage CMOS semiconductor products.
Desirable are latch-up resistant CMOS semiconductor products that may be readily fabricated.
The invention is directed towards the foregoing object.